Samsung has added a 2nm process node to its foundry roadmap, and said products built with the new technology are expected to go on sale in 2025.
Whenever it lands, the chips will use gate-all-around (GAA) technology that the South Korean giant debuted in 2019. As The register previously detailed, GAA is an attempt to pack more transistors onto silicon dies.
GAA is necessary because the current technique used to increase density – involving fin-shaped field-effect transistors (FinFETs) – relies on the fact that the gate structure of the transistor stands up much like a fin of fish. This FinFET design loses its performance advantages and becomes unappealing to engineers because the devices are downsized, which is definitely happening as advanced manufacturing processes move towards 5nm nodes and 3nm.
As the name suggests, GAA moves the transistor channel to the door thin so that the gate material surrounds the channel, increasing the contact area and getting the manufacture of efficient, densely packed semiconductors back on track. Samsung, IBM and TSMC are all working on GAA technology.
The Korean giant calls its effort Multi-Bridge-Channel FET (MBCFET), and claims that its first-generation 3nm node using the technology will offer “up to 35% area reduction, 30% higher performance, or 50% of lower power”. consumption compared to the 5 nm process.”
“Three-nanometer logic yield is approaching a level similar to the 4nm process, which is currently in mass production,” the biz said. announcement at its annual foundry forum yesterday.
Samsung previously announced that it would launch the 3nm process node in 2021. Now it is said that the first-generation 3nm products will arrive in the first half of 2022, with a more refined version expected the following year.
The company also revealed that a 2nm process node – again based on MBCFET – “is in early stages of development with mass production in 2025”.
While we wait for that, Samsung has also tickled its 17nm process by adding a 3D transistor architecture which it says will improve power consumption and increase performance by almost 40% over the 28nm process of the business. The chaebol has additionally paid some attention to its 14nm process “to support 3.3V high-voltage or flash embedded MRAM (eMRAM) which helps increase write speed and density.”
5G is also on Samsung’s radar, with 8nm platforms being upgraded in ways that ensure the Korean giant can deliver products suitable for mmWave RF applications.
Samsung has made massive investments in foundry capacity. Like other chipmakers, it hopes to take advantage of long-term demand for semiconductors and build supply chains that are more resilient and less reliant on inputs from China – to avoid geopolitical entanglements.
If Samsung can hit its 2025 schedule for 2nm, it will deliver about a year after Taiwan’s TSMC plans to mass-produce its own silicon at that node. Speaking of TSMC, it hopes to roll out 3nm node parts in volume in the second half of next year.
Meanwhile, IBM is developing its own 2nm design; However, Big Blue will need a foundry like Samsung or Intel to make this technology a reality.
And, to reiterate, the listed size of a silicon manufacturing process doesn’t really matter, because the individual elements of a real array will be larger than the name suggests. Intel recently changed the names of its manufacturing processes accordingly, to monikers like “Intel 3” and “20A”, in which the A stands for ångström – a unit of length equal to 0.1 nanometer. ®
A reader pointed out that the International Union of Pure and Applied Chemistry’s Golden Book – the Definitive Compendium of Chemical Terminology – insists the official contraction of ångströms is Å. The register looks forward to being copied on any correspondence between the union and the Intel Trademark Police regarding this matter.